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Issue DateTitleAuthor(s)
15-Feb-2018ADAM: Automated Design Analysis and Merging for Speeding up FPGA Development.Ng, H-C; Liu, S; Luk, W; Anderson, JH; Bazargan, K, et al
27-Aug-2018Hardware compilation of deep neural networks: an overviewZhao, R; Liu, S; Ng, H; Wang, E; Davis, JJ, et al
5-Oct-2017Reconfigurable acceleration of genetic sequence alignment: A survey of two decades of effortsNg, HC; Liu, S; Luk, W; Engineering & Physical Science Research Council (E; Commission of the European Communities, et al
20-Jun-2019Memory-efficient architecture for accelerating generative networks on FPGALiu, S; Zeng, C; Fan, H; Ng, H-C; Meng, J, et al
15-Jul-2019Efficient weight reuse for large LSTMsQue, Z; Nugent, T; Liu, S; Tian, L; Niu, X, et al
13-Sep-2019Towards an efficient accelerator for DNN-based remote sensing image segmentation on FPGAsLiu, S; Niu, X; Luk, W
15-Jul-2019F-E3D: FPGA-based acceleration of an efficient 3D convolutional neural network for human action recognitionFan, H; Luo, C; Zeng, C; Ferianc, M; Que, Z, et al
1-Dec-2018Optimizing CNN-based segmentation with deeply customized convolutional and deconvolutional architectures on FPGALiu, S; Fan, H; Niu, X; Ng, H-C; Chu, Y, et al