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Results 1-10 of 14
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Issue DateTitleAuthor(s)
5-Jun-2017A Fully-Pipelined Hardware Design for Gaussian Mixture ModelsHe, C; Fu, H; Guo, C; Luk, W; Yang, G, et al
22-Jun-2017Lossless Compression Decoders for Bitstreams and Software Binaries Based on High-Level SynthesisYan, J; Yuan, J; Leong, PHW; Luk, W; Wang, L, et al
8-May-2017Run-time reconfigurable acceleration for genetic programming fitness evaluation in trading strategiesFunie, AI; Grigoras, P; Burovskiy, P; Luk, W; Salmon, M, et al
5-Oct-2017Customised pearlmutter propagation: A hardware architecture for trust region policy optimisationShao, S; Luk, W; , et al
19-Aug-2017Exploiting the chaotic behaviour of atmospheric models with reconfigurable architecturesRussell, FP; Düben, PD; Niu, X; Luk, W; Palmer, TN, et al
5-Oct-2017Validating optimisations for chaotic simulationsTargett, JS; Düben, P; Luk, W; , et al
18-Oct-2017FP-BNN: Binarized neural network on FPGALiang, S; Yin, S; Liu, L; Luk, W; Wei, S, et al
5-Oct-2017Exploring the potential of reconfigurable platforms for order book updateHe, C; Fu, H; Luk, W; Li, W; Yang, G, et al
5-Oct-2017Reconfigurable acceleration of genetic sequence alignment: A survey of two decades of effortsNg, HC; Liu, S; Luk, W; , et al
31-Mar-2017Custom framework for run-time trading strategiesFunie, AI; Guo, L; Niu, X; Luk, W; Salmon, M, et al