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Issue DateTitleAuthor(s)
21-Feb-2016CASK - Open-source custom architectures for sparse kernelsGrigoras, P; Burovskiy, P; Luk, W; , et al
13-Mar-2016A scalable dataflow accelerator for real time onboard hyperspectral image classificationWang, S; Niu, X; Ma, N; Luk, W; Leong, P, et al
28-Jan-2016Lower precision for higher accuracy: precision and resolution exploration for shallow water equationsTargett, JS; Niu, X; Russell, F; Luk, W; Jeffress, S, et al
1-Dec-2016F-CNN: An FPGA-based Framework for Training Convolutional Neural NetworksZhao, W; Fu, H; Luk, W; Yu, T; Wang, S, et al
1-Dec-2016A domain specific language for accelerated multilevel Monte Carlo simulationsLindsey, B; Leslie, M; Luk, W; , et al
1-Dec-2016Relation-oriented resource allocation for multi-accelerator systemsYu, T; Feng, B; Stillwell, M; Coutinho, JGF; Zhao, W, et al
28-Jan-2016FPGA acceleration of reference-based compression for genomic dataArram, J; Pflanzer, M; Kaplan, T; Luk, W; , et al
29-Sep-2016Optimising Sparse Matrix Vector multiplication for large scale FEM problems on FPGAGrigoras, P; Burovskiy, P; Luk, W; Sherwin, S; , et al
29-Sep-2016EURECA compilation: Automatic optimisation of cycle-reconfigurable circuitsNiu, X; Ng, C; Yumi, T; Wang, S; Yoshida, N, et al
29-Sep-2016Connect on the fly: enhancing and prototyping of cycle-reconfigurable modulesZhou, H; Niu, X; Yuan, J; Wang, L; Luk, W, et al